2 papers
cs.ET2026
An FPGA-ASIC Co-Design Framework for Capacity-Constrained Physics-Based Ising Chips
Ruihong Yin, Yue Zheng, Chaohui Li +6
When a problem exceeds an analog Ising machine's spin capacity it cannot be solved in one shot: a digital orchestration layer must iteratively decompose the graph, clamp boundary s…
cs.ET2025
On Solving Structured SAT on Ising Machines: A Semiprime Factorization Study
Ahmet Efe, Hüsrev Cılasun, Abhimanyu Kumar +9
Ising machines are emerging as a new technology for solving various classes of computationally hard problems of practical importance, yet their limits on structured SAT workloads,…