2 citations · 6 across the 30 of their papers we have counts for
5 papers · 1 filter
Learning Structural Manipulability in Gate-Level Netlists Using Graph Neural Networks
Rupesh Raj Karn, Ozgur Sinanoglu
Gate-level netlists exhibit intrinsic structural properties that influence signal propagation independently of functional simulation. We define a topology-driven structural manipul…
Leaking Circuit Secrets: Gradient Leakage Attacks on Graph Neural Networks
Rupesh Raj Karn, Johann Knechtel, Ozgur Sinanoglu
As graph neural networks (GNNs) become standard tools for critical tasks in circuit design and analysis, their security and privacy risks require careful attention. Here, we presen…
VeriDispatcher: Multi-Model Dispatching through Pre-Inference Difficulty Prediction for RTL Generation Optimization
Zeng Wang, Weihua Xiao, Minghao Shao +4
Large Language Models (LLMs) show strong performance in RTL generation, but different models excel on different tasks because of architecture and training differences. Prior work m…
SALAD: Systematic Assessment of Machine Unlearning on LLM-Aided Hardware Design
Zeng Wang, Minghao Shao, Rupesh Karn +6
Large Language Models (LLMs) offer transformative capabilities for hardware design automation, particularly in Verilog code generation. However, they also pose significant data sec…
LLMs and the Future of Chip Design: Unveiling Security Risks and Building Trust
Zeng Wang, Lilas Alrahis, Likhitha Mankali +2
Chip design is about to be revolutionized by the integration of large language, multimodal, and circuit models (collectively LxMs). While exploring this exciting frontier with trem…