2 citations · 6 across the 30 of their papers we have counts for
4 papers · 2 filters
Configuration Over Selection: Hyperparameter Sensitivity Exceeds Model Differences in Open-Source LLMs for RTL Generation
Minghao Shao, Zeng Wang, Weimin Fu +5
Benchmarking of open-source LLMs for hardware design focuses on which LLMs to use, while treating inference-time decoding configuration as a secondary concern. This work shows that…
From Natural Language to Silicon: The Representation Bottleneck in LLM Hardware Design
Weimin Fu, Zeng Wang, Minghao Shao +5
Edge applications increasingly demand custom hardware, yet Field-Programmable Gate Array (FPGA) design requires expertise that domain engineers lack. Large Language Models (LLMs) p…
VeriCWEty: Embedding enabled Line-Level CWE Detection in Verilog
Prithwish Basu Roy, Zeng Wang, Anatolii Chuvashlov +4
Large Language Models (LLMs) have shown significant improvement in RTL code generation. Despite the advances, the generated code is often riddled with common vulnerabilities and we…
Synthesis-in-the-Loop Evaluation of LLMs for RTL Generation: Quality, Reliability, and Failure Modes
Weimin Fu, Zeng Wang, Minghao Shao +5
RTL generation is more than code synthesis. Designs must be syntactically valid, synthesizable, correct, hardware-efficient. SOTA evaluations stop at functional correctness and do…