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20242026
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cs.AR2026

PCB-QA: Evaluating LLMs over the First Printed Circuit Board Design Question-Answer Dataset

Sahana Srinivasan, Benjamin Tan, Benjamin Turnbull +1

Large Language Models (LLMs) have demonstrated capabilities in electronic design automation (EDA) for integrated circuits. However, their applications in printed circuit board (PCB…

cs.AR2026

Surveying GenAI-based Automation in Printed Circuit Board Design and Test

Sahana Srinivasan, Benjamin Turnbull, Hammond Pearce

Generative artificial intelligence (GenAI) is increasingly used for applications in the hardware and software domains. It purports to reduce the manual effort involved in the devel…

cs.AR2025

Towards LLM-based Root Cause Analysis of Hardware Design Failures

Siyu Qiu, Muzhi Wang, Raheel Afsharmazayejani +3

With advances in large language models (LLMs), new opportunities have emerged to develop tools that support the digital hardware design process. In this work, we explore how LLMs c…

cs.AR2025

Automatically Improving LLM-based Verilog Generation using EDA Tool Feedback

Jason Blocklove, Shailja Thakur, Benjamin Tan +3

Traditionally, digital hardware designs are written in the Verilog hardware description language (HDL) and debugged manually by engineers. This can be time-consuming and error-pron…

cs.AR2024

Evaluating LLMs for Hardware Design and Test

Jason Blocklove, Siddharth Garg, Ramesh Karri +1

Large Language Models (LLMs) have demonstrated capabilities for producing code in Hardware Description Languages (HDLs). However, most of the focus remains on their abilities to wr…

cs.AR2024

LLM-aided explanations of EDA synthesis errors

Siyu Qiu, Benjamin Tan, Hammond Pearce

Training new engineers in digital design is a challenge, particularly when it comes to teaching the complex electronic design automation (EDA) tooling used in this domain. Learners…