9 citations · 12 across the 4 of their papers we have counts for
4 papers
FastLEC: Parallel Datapath Equivalence Checking with Hybrid Engines
Xindi Zhang, Furong Ye, Zhihan Chen +1
Combinational equivalence checking (CEC) remains a challenge EDA task in the formal verification of datapath circuits due to their complex arithmetic structures and the limited cap…
Datapath Combinational Equivalence Checking With Hybrid Sweeping Engines and Parallelization
Zhihan Chen, Xindi Zhang, Yuhang Qian +1
In the application of IC design for microprocessors, there are often demands for optimizing the implementation of datapath circuits, on which various arithmetic operations are perf…
Revisiting Restarts of CDCL: Should the Search Information be Preserved?
Xindi Zhang, Zhihan Chen, Shaowei Cai
SAT solvers are indispensable in formal verification for hardware and software with many important applications. CDCL is the most widely used framework for modern SAT solvers, and…
DeepSAT: An EDA-Driven Learning Framework for SAT
Min Li, Zhengyuan Shi, Qiuxia Lai +3
We present DeepSAT, a novel end-to-end learning framework for the Boolean satisfiability (SAT) problem. Unlike existing solutions trained on random SAT instances with relatively we…