3 papers
cs.AR2026
Capstone: Power-Capped Pipelining for Coarse-Grained Reconfigurable Array Compilers
Sabrina Yarzada, Christopher Torng
Coarse-grained reconfigurable arrays (CGRAs) have attracted growing interest because they exhibit performance and energy efficiency competitive with ASICs while maintaining flexibi…
cs.AR2025
A Vertically Integrated Framework for Templatized Chip Design
Jeongeun Kim, Christopher Torng
Developers who primarily engage with software often struggle to incorporate custom hardware into their applications, even though specialized silicon can provide substantial benefit…
cs.AR2025
Algorithm-Driven On-Chip Integration for High Density and Low Cost
Jeongeun Kim, Sabrina Yarzada, Paul Chen +1
Growing interest in semiconductor workforce development has generated demand for platforms capable of supporting large numbers of independent hardware designs for research and trai…