4 papers
PowerFlow-DNN: Compiler-Directed Fine-Grained Power Orchestration for End-to-End Edge AI Inference
Paul Yi-Chia Chen, Jeongeun Kim, Wenbo Zhu +4
Edge AI systems operate under stringent energy and volume constraints, demanding extreme efficiency on limited battery capacity, with requirements worsening as intelligent capabili…
Capstone: Power-Capped Pipelining for Coarse-Grained Reconfigurable Array Compilers
Sabrina Yarzada, Christopher Torng
Coarse-grained reconfigurable arrays (CGRAs) have attracted growing interest because they exhibit performance and energy efficiency competitive with ASICs while maintaining flexibi…
A Vertically Integrated Framework for Templatized Chip Design
Jeongeun Kim, Christopher Torng
Developers who primarily engage with software often struggle to incorporate custom hardware into their applications, even though specialized silicon can provide substantial benefit…
Chipstitch: A Scalable and Cost-Efficient Platform for Accelerated Silicon Prototyping
Jeongeun Kim, Sabrina Yarzada, Paul Chen +4
Silicon evidence serves as a critical receipt of credibility across academia and industry, validating innovation and signaling feasibility in ways that simulations alone cannot. It…