1 citations · 2 across the 6 of their papers we have counts for
6 papers
ReVEAL: GNN-Guided Reverse Engineering for Formal Verification of Optimized Multipliers
Chen Chen, Daniela Kaufmann, Chenhui Deng +3
We present ReVEAL, a graph-learning-based method for reverse engineering of multiplier architectures to improve algebraic circuit verification techniques. Our framework leverages s…
e-boost: Boosted E-Graph Extraction with Adaptive Heuristics and Exact Solving
Jiaqi Yin, Zhan Song, Chen Chen +3
E-graphs have attracted growing interest in many fields, particularly in logic synthesis and formal verification. E-graph extraction is a challenging NP-hard combinatorial optimiza…
Revisit Choice Network for Synthesis and Technology Mapping
Chen Chen, Jiaqi Yin, Cunxi Yu
Choice network construction is a critical technique for alleviating structural bias issues in Boolean optimization, equivalence checking, and technology mapping. Previous works on…
HEC: Equivalence Verification Checking for Code Transformation via Equality Saturation
Jiaqi Yin, Zhan Song, Nicolas Bohm Agostini +2
In modern computing systems, compilation employs numerous optimization techniques to enhance code performance. Source-to-source code transformations, which include control flow and…
E-morphic: Scalable Equality Saturation for Structural Exploration in Logic Synthesis
Chen Chen, Guangyu HU, Cunxi Yu +2
In technology mapping, the quality of the final implementation heavily relies on the circuit structure after technology-independent optimization. Recent studies have introduced equ…
BoolE: Exact Symbolic Reasoning via Boolean Equality Saturation
Jiaqi Yin, Zhan Song, Chen Chen +2
Boolean symbolic reasoning for gate-level netlists is a critical step in verification, logic and datapath synthesis, and hardware security. Specifically, reasoning datapath and add…