activity
20222026
most citedPDNPulse: Sensing PCB Anomaly with the Intrinsic Power Delivery Network

23 citations · 24 across the 8 of their papers we have counts for

collaborators

9 papers

cs.AI2026

Incremental Risk Assessment of Progressive Elder Financial Scams via Instruction-Tuned Small Language Models

Parviz Ghafariasl, Weimin Fu, Xiaolong Guo +1

Financial scams targeting older adults increasingly occur through text and voice channels such as email, SMS, and phone calls, unfolding over multiple conversational turns that beg…

cs.CL2026

FinHardBench: Can LLMs Generate Latency-Aware Hardware for Financial Computing?

Weimin Fu, Hejia Zhang, Minghao Shao +6

Can large language models generate not just correct, but fast hardware? This paper investigates the question in financial FPGA design, where 5-10 nanoseconds of latency determines…

cs.AR2026

Configuration Over Selection: Hyperparameter Sensitivity Exceeds Model Differences in Open-Source LLMs for RTL Generation

Minghao Shao, Zeng Wang, Weimin Fu +5

Benchmarking of open-source LLMs for hardware design focuses on which LLMs to use, while treating inference-time decoding configuration as a secondary concern. This work shows that…

cs.AR2026

From Natural Language to Silicon: The Representation Bottleneck in LLM Hardware Design

Weimin Fu, Zeng Wang, Minghao Shao +5

Edge applications increasingly demand custom hardware, yet Field-Programmable Gate Array (FPGA) design requires expertise that domain engineers lack. Large Language Models (LLMs) p…

cs.CR2026★ 1 cited

HarmChip: Evaluating Hardware Security Centric LLM Safety via Jailbreak Benchmarking

Zeng Wang, Minghao Shao, Weimin Fu +6

The integration of large language models (LLMs) into electronic design automation (EDA) workflows has introduced powerful capabilities for RTL generation, verification, and design…

cs.AR2026

Synthesis-in-the-Loop Evaluation of LLMs for RTL Generation: Quality, Reliability, and Failure Modes

Weimin Fu, Zeng Wang, Minghao Shao +5

RTL generation is more than code synthesis. Designs must be syntactically valid, synthesizable, correct, hardware-efficient. SOTA evaluations stop at functional correctness and do…

cs.AR2025

AnalogSAGE: Self-evolving Analog Design Multi-Agents with Stratified Memory and Grounded Experience

Zining Wang, Jian Gao, Weimin Fu +2

Analog circuit design remains a knowledge- and experience-intensive process that relies heavily on human intuition for topology generation and device parameter tuning. Existing LLM…

cs.CL2024

Hardware Phi-1.5B: A Large Language Model Encodes Hardware Domain Specific Knowledge

Weimin Fu, Shijie Li, Yifang Zhao +6

In the rapidly evolving semiconductor industry, where research, design, verification, and manufacturing are intricately linked, the potential of Large Language Models to revolution…

cs.CR2022★ 23 cited

PDNPulse: Sensing PCB Anomaly with the Intrinsic Power Delivery Network

Huifeng Zhu, Haoqi Shan, Dean Sullivan +3

The ubiquitous presence of printed circuit boards (PCBs) in modern electronic systems and embedded devices makes their integrity a top security concern. To take advantage of the ec…