collaborators

17 papers

cs.AR2026

G-Power: Architecture-level GPU Power Modeling with Aggregated Knowledge Foundations from Known GPUs

Qijun Zhang, Yao Lu, Shang Liu +4

Graphics Processing Units (GPUs) have been serving as critical computation resources for large-scale parallel computations. With increasing chip complexity, power efficiency has be…

cs.AR2026

RTL-Sequencer: Towards Scalable RTL Timing Prediction with the Sequence-based Paradigm

Ziyan Guo, Wenji Fang, Wenkai Li +3

Accurate timing prediction at the register-transfer level (RTL) is a longstanding challenge in design automation. Existing graph-based methods struggle with limited receptive field…

cs.AR2026

A Survey of Circuit Foundation Model: Foundation AI Models for VLSI Circuit Design and EDA

Wenji Fang, Jing Wang, Yao Lu +4

Artificial intelligence (AI)-driven electronic design automation (EDA) techniques have been extensively explored for VLSI circuit design applications. Most recently, foundation AI…

cs.AR2026

IMPart: Integration of Memetic Operations into Multi-Level Framework for Large-k-Way Hypergraph Partitioning

Yugao Zhu, Zhicheng Guo, Shang Liu +3

The problem of k-way hypergraph partitioning is fundamental with significant applications in various fields, including VLSI design and scientific computing. State-of-the-art hyperg…

cs.AI2026

RTL-BenchLS: A Large-Scale Benchmark for RTL Reasoning and Generation with Large Language Models

Jing Wang, Shang Liu, Wenji Fang +3

LLM-based RTL generation and reasoning is a promising direction for hardware design automation. High-quality benchmarks are critical infrastructure for tracking progress in this di…

cs.AR2026

ICP: Exploiting Instruction Correlation for Prefetching Irregular Memory Accesses

Mengming Li, Chenlu Miao, Buqing Xu +7

Irregular memory accesses pose challenges for effective and efficient data prefetching. While temporal prefetchers have recently shown promise for irregular memory access patterns,…