3 papers
cs.SE2026
Towards Reliable AI-Assisted Analog Design: Template-Constrained LLM Agents for SAR ADC Generation
Dimple Vijay Kochar, Hae-Seung Lee, Anantha P. Chandrakasan
While Large Language Models (LLMs) have demonstrated significant capability in software code generation, their application to analog Electronic Design Automation (EDA) is bottlenec…
cs.AR2026
GRPO with State Mutations: Improving LLM-Based Hardware Test Plan Generation
Dimple Vijay Kochar, Nathaniel Pinckney, Guan-Ting Liu +4
RTL design often relies heavily on ad-hoc testbench creation early in the design cycle. While large language models (LLMs) show promise for RTL code generation, their ability to re…
cs.LG2024
LEDRO: LLM-Enhanced Design Space Reduction and Optimization for Analog Circuits
Dimple Vijay Kochar, Hanrui Wang, Anantha Chandrakasan +1
Traditional approaches for designing analog circuits are time-consuming and require significant human expertise. Existing automation efforts using methods like Bayesian Optimizatio…