8 citations · 18 across the 10 of their papers we have counts for
10 papers
SPARC: Automated Root-Cause Analysis of Pre-Silicon Power Side-Channel Leakage in the Processor Design Flow
Andrija Nešković, Christian Ewert, Mladen Berekovic +1
Power-Side-Channel Leakage (PSCL) originates from architectural and micro-architectural artifacts in a processor and poses a severe threat to the confidentiality of cryptographic s…
Robust Beam Codebooks for mmWave/THz Systems: Toward a Stochastic RL Approach
Anouar Nechi, Rainer Buchty, Mladen Berekovic +1
Millimeter-wave (mmWave) and terahertz (THz) massive MIMO systems often rely on predefined beamforming codebooks, which are usually suboptimal in Non-Line-of-Sight (NLoS) condition…
SAILOR: A Scalable and Energy-Efficient Ultra-Lightweight RISC-V for IoT Security
Christian Ewert, Tim Hardow, Melf Fritsch +5
Recently, RISC-V has contributed to the development of IoT devices, requiring architectures that balance energy efficiency, compact area, and integrated security. However, most rec…
IMS: Intelligent Hardware Monitoring System for Secure SoCs
Wadid Foudhaili, Aykut Rencber, Anouar Nechi +4
In the modern Systems-on-Chip (SoC), the Advanced eXtensible Interface (AXI) protocol exhibits security vulnerabilities, enabling partial or complete denial-of-service (DoS) throug…
Lightweight Unified Sha-3/Shake Architecture with a Fault-Resilient State
Christian Ewert, Amrit Sharma Poudel, Mouadh Ayache +5
Hash functions have become a key part of standard Post-quantum cryptography (PQC) schemes, especially Sha-3 and Shake, calling arXiv:submit/7045552 [cs.AR] 3 Dec 2025 for lightweig…
Nail: Not Another Fault-Injection Framework for Chisel-generated RTL
Robin Sehm, Christian Ewert, Rainer Buchty +2
Fault simulation and emulation are essential techniques for evaluating the dependability of integrated circuits, enabling early-stage vulnerability analysis and supporting the impl…
Secure Software/Hardware Hybrid In-Field Testing for System-on-Chip
Saleh Mulhem, Christian Ewert, Andrija Neskovic +4
Modern Systems-on-Chip (SoCs) incorporate built-in self-test (BIST) modules deeply integrated into the device's intellectual property (IP) blocks. Such modules handle hardware faul…
Reconfigurable Edge Hardware for Intelligent IDS: Systematic Approach
Wadid Foudhaili, Anouar Nechi, Celine Thermann +4
Intrusion detection systems (IDS) are crucial security measures nowadays to enforce network security. Their task is to detect anomalies in network communication and identify, if no…
SystemC Model of Power Side-Channel Attacks Against AI Accelerators: Superstition or not?
Andrija Nešković, Saleh Mulhem, Alexander Treff +3
As training artificial intelligence (AI) models is a lengthy and hence costly process, leakage of such a model's internal parameters is highly undesirable. In the case of AI accele…
Practical Trustworthiness Model for DNN in Dedicated 6G Application
Anouar Nechi, Ahmed Mahmoudi, Christoph Herold +4
Artificial intelligence (AI) is considered an efficient response to several challenges facing 6G technology. However, AI still suffers from a huge trust issue due to its ambiguous…