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cs.ET2026
An FPGA-ASIC Co-Design Framework for Capacity-Constrained Physics-Based Ising Chips
Ruihong Yin, Yue Zheng, Chaohui Li +6
When a problem exceeds an analog Ising machine's spin capacity it cannot be solved in one shot: a digital orchestration layer must iteratively decompose the graph, clamp boundary s…
cs.LG2026
Extractive summarization on a CMOS Ising machine
Ziqing Zeng, Abhimanyu Kumar, Ahmet Efe +4
Extractive summarization (ES) aims to generate a concise summary by selecting a subset of sentences from a document while maximizing relevance and minimizing redundancy. Although m…