activity
20232026
most citedPhysically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement

7 citations · 19 across the 17 of their papers we have counts for

collaborators

17 papers

eess.SY2026

AutoDRI: Bridging the Semantic Gap for Automated Design Rule Integration in CP-SAT-Based Cell Synthesis under Multi-Patterning

Yuhao Ren, Yucheng Wang, Zihao Chen +2

Design-rule integration (DRI) remains a major bottleneck for scalable (Constraint Programming with SAT) CP-SAT-based standard cell synthesis and rapid technology enablement at adva…

cs.AR2026

PACT: Post-route Agentic Checkpoint Tuning for FPGA Timing Closure

Huan Lin, Kunlong Li, Lingli Wang +1

Late-stage FPGA timing closure often starts from an implemented design whose remaining violations are visible in timing reports. Engineering change order (ECO) optimization is a st…

cs.AR2026

From Tool Invocation to Source-Mechanism Exploration: Protected White-Box DSE for Open-Source EDA

Zhiyu Zheng, Yiming Du, Ziyi Wang +1

Open-source EDA tools allow design-space exploration (DSE) to move beyond public knobs and into bounded source-level mechanisms inside staged optimizers. We present ReviewDSE, a pr…

cs.AR2026

GoalEvolve: From Handcrafted Algorithm Priors to Goal-Driven Evolution of Physical Design Algorithms

Haixu Liu, Lei Zhou, Yuhao Ren +2

Physical design algorithms operate within tightly coupled, multi-stage optimization flows, where stage-local gains may vanish or induce downstream degradation. Existing program-evo…

eess.SY2026

Invited: Toward Sustainable and Transparent Benchmarking for Academic Physical Design Research

Liwen Jiang, Andrew B. Kahng, Zhiang Wang +1

This paper presents RosettaStone 2.0, an open benchmark translation and evaluation framework built on OpenROAD-Research. RosettaStone 2.0 provides complete RTL-to-GDS reference flo…

eess.SP2025

Bridging the Initialization Gap: A Co-Optimization Framework for Mixed-Size Global Placement

Yuhao Ren, Yiting Liu, Yanfei Zhou +4

Global placement is a critical step with high computational complexity in VLSI physical design. Modern analytical placers formulate the placement problem as a nonlinear optimizatio…

cs.AR2025

ReMaP: Macro Placement by Recursively Prototyping and Packing Tree-based Relocating

Yunqi Shi, Xi Lin, Zhiang Wang +8

This work introduces the ReMaP method, which generates expert-quality macro placements through recursively prototyping and packing tree-based relocating. We first perf…

cs.LG2025

Recursive Learning-Based Virtual Buffering for Analytical Global Placement

Andrew B. Kahng, Yiting Liu, Zhiang Wang

Due to the skewed scaling of interconnect versus cell delay in modern technology nodes, placement with buffer porosity (i.e., cell density) awareness is essential for timing closur…

cs.AR2025

ChipletPart: Cost-Aware Partitioning for 2.5D Systems

Alexander Graening, Puneet Gupta, Andrew B. Kahng +2

Industry adoption of chiplets has been growing as chiplets are a cost-effective option for making large, high-performance systems. Consequently, partitioning large systems into chi…

cs.AI2025

ORFS-agent: Tool-Using Agents for Chip Design Optimization

Amur Ghose, Andrew B. Kahng, Sayak Kundu +1

Machine learning has been widely used to optimize complex engineering workflows across numerous domains. In integrated circuit design, modern flows (e.g., register-transfer level t…

cs.LO2024★ 7 cited

Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement

Hongyang Pan, Cunqing Lan, Yiting Liu +5

A typical VLSI design flow is divided into separated front-end logic synthesis and back-end physical design (PD) stages, which often require costly iterations between these stages…

cs.AR2024★ 1 cited

DG-RePlAce: A Dataflow-Driven GPU-Accelerated Analytical Global Placement Framework for Machine Learning Accelerators

Andrew B. Kahng, Zhiang Wang

Global placement is a fundamental step in VLSI physical design. The wide use of 2D processing element (PE) arrays in machine learning accelerators poses new challenges of scalabili…

cs.LG2023★ 1 cited

An Open-Source ML-Based Full-Stack Optimization Framework for Machine Learning Accelerators

Hadi Esmaeilzadeh, Soroush Ghodrati, Andrew B. Kahng +8

Parameterizable machine learning (ML) accelerators are the product of recent breakthroughs in ML. To fully enable their design space exploration (DSE), we propose a physical-design…

cs.AR2023★ 2 cited

Performance Analysis of DNN Inference/Training with Convolution and non-Convolution Operations

Hadi Esmaeilzadeh, Soroush Ghodrati, Andrew B. Kahng +4

Today's performance analysis frameworks for deep learning accelerators suffer from two significant limitations. First, although modern convolutional neural network (CNNs) consist o…

cs.LG2023★ 2 cited

K-SpecPart: Supervised embedding algorithms and cut overlay for improved hypergraph partitioning

Ismail Bustany, Andrew B. Kahng, Ioannis Koutis +2

State-of-the-art hypergraph partitioners follow the multilevel paradigm that constructs multiple levels of progressively coarser hypergraphs that are used to drive cut refinement o…

eess.SY2023★ 4 cited

Hier-RTLMP: A Hierarchical Automatic Macro Placer for Large-scale Complex IP Blocks

Andrew B. Kahng, Ravi Varadarajan, Zhiang Wang

In a typical RTL to GDSII flow, floorplanning or macro placement is a critical step in achieving decent quality of results (QoR). Moreover, in today's physical synthesis flows (e.g…

cs.LG2023★ 2 cited

An Updated Assessment of Reinforcement Learning for Macro Placement

Chung-Kuan Cheng, Andrew B. Kahng, Sayak Kundu +2

We provide an improved assessment of Google Brain's deep reinforcement learning approach to macro placement and its updated Circuit Training (CT) implementation in GitHub. A strong…