1 citations · 1 across the 5 of their papers we have counts for
5 papers
Experiments and Modeling of Defect Dynamics and BTI Behavior in Doped InO TFTs during C Post-Processing Forming Gas Annealing
Yu-Hsin Kuo, Chengyang Zhang, Priyankka Ravikumar +13
We investigate the impact of a monolithic three-dimensional (M3D) integration process-critical C post-processing forming gas anneal (FGA) on the electrical performance,…
Thermal Processing Limits in Oxide-Channel Ferroelectric Field Effect Transistors
Lance Fernandes, Yu-Hsin Kuo, Chengyang Zhang +15
In this work, we report a systematic study of the impact of high-temperature post-capping thermal annealing on the memory characteristics of Oxide-semiconductor channel ferroelectr…
Engineering Wake-Up-Free Ferroelectric Capacitors with Enhanced High-Temperature Reliability
Nashrah Afroze, Salma Soliman, Yu-Hsin Kuo +5
We systematically explore the design space of ferroelectric hafnium-zirconium oxide (H0.5Z0.5O or HZO) heterostructures for reliable high temperature operation. HZO films are depos…
ALD-Derived WO3-x Leads to Nearly Wake-Up-Free Ferroelectric Hf0.5Zr0.5O2 at Elevated Temperatures
Nashrah Afroze, Jihoon Choi, Salma Soliman +10
Breaking the memory wall in advanced computing architectures will require complex 3D integration of emerging memory materials such as ferroelectrics-either within the back-end-of-l…
Hf/Zr Superlattice-Based High-\k{appa} Gate Dielectrics with Dipole Layer Engineering for Advanced CMOS
Taeyoung Song, Sanghyun Kang, Yu Hsin Kuo +7
Advanced logic transistors require gate dielectrics that achieve sub-nanometer equivalent oxide thickness (EOT), suppress leakage, and satisfy three key requirements: (i) compatibi…