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cs.AR2026
Themis: Software-Defined Hardware Prefetching
Keisuke Kamahori, Neil Adit, Kan Zhu +13
Data cache misses represent a significant portion of stall cycles in datacenter workloads. Hardware prefetchers that reduce such stalls by fetching data ahead of time have become i…
cs.AR2025
Concorde: Fast and Accurate CPU Performance Modeling with Compositional Analytical-ML Fusion
Arash Nasr-Esfahany, Mohammad Alizadeh, Victor Lee +9
Cycle-level simulators such as gem5 are widely used in microarchitecture design, but they are prohibitively slow for large-scale design space explorations. We present Concorde, a n…