2 papers
cs.LG2026
GauS: Differentiable Scheduling Optimization via Gaussian Reparameterization
Yaohui Cai, Vesal Bakhtazad, Cunxi Yu +1
Efficient operator scheduling is a fundamental challenge in software compilation and hardware synthesis. While recent differentiable approaches have sought to replace traditional o…
cs.AR2025
Mapping Fusion: Improving FPGA Technology Mapping with ASIC Mapper
Cunxi Yu
LUT (Look-Up Table) mapping is a critical step in FPGA logic synthesis, where a logic network is transformed into a form that can be directly implemented using the FPGA's LUTs. An…