7 papers
HINT: Toward an Executable Hardware-Intent Representation Layer for LLM-Driven RTL Generation
Tairan Cheng, Yi Liu, Dongsheng Zuo +6
Generating implementation-quality RTL with large language models (LLMs) remains difficult because direct generation must resolve microarchitecture while simultaneously producing an…
MappingEvolve: LLM-Driven Code Evolution for Technology Mapping
Rongliang Fu, Yi Liu, Qiang Xu +1
Technology mapping is a critical yet challenging stage in logic synthesis. While Large Language Models (LLMs) have been applied to generate optimization scripts, their potential fo…
DynamicRTL: RTL Representation Learning for Dynamic Circuit Behavior
Ruiyang Ma, Yunhao Zhou, Yipeng Wang +9
There is a growing body of work on using Graph Neural Networks (GNNs) to learn representations of circuits, focusing primarily on their static characteristics. However, these model…
DeepRTL2: A Versatile Model for RTL-Related Tasks
Yi Liu, Hongji Zhang, Yunhao Zhou +3
The integration of large language models (LLMs) into electronic design automation (EDA) has significantly advanced the field, offering transformative benefits, particularly in regi…
Speculative Decoding for Verilog: Speed and Quality, All in One
Changran Xu, Yi Liu, Yunhao Zhou +3
The rapid advancement of large language models (LLMs) has revolutionized code generation tasks across various programming languages. However, the unique characteristics of programm…
DeepCircuitX: A Comprehensive Repository-Level Dataset for RTL Code Understanding, Generation, and PPA Analysis
Zeju Li, Changran Xu, Zhengyuan Shi +11
This paper introduces DeepCircuitX, a comprehensive repository-level dataset designed to advance RTL (Register Transfer Level) code understanding, generation, and power-performance…