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cs.AR2026
TALU: A Reconfigurable Tiled-ALU Grid for RISC-V
Ali Emre Oztas, Can Erim Karsal, Mahir Demir +1
Lane-based RISC-V vector processors exploit data parallelism well but pay a recurring cost for two common patterns: reductions, which require a separate tree pass, and deep depende…
cs.AR2026
DPU or GPU for Accelerating Neural Networks Inference -- Why not both? Split CNN Inference
Ali Emre Oztas, Mahir Demir, James Garside +1
Video and image streaming on edge devices requires low latency. To address this, Neural Networks (NNs) are widely used, and prior work mainly focuses on accelerating them with sing…