activity
20242026
most citedDesigning Efficient LLM Accelerators for Edge Devices

4 citations · 4 across the 8 of their papers we have counts for

collaborators

9 papers

cs.AR2026

FlexViT: A Flexible FPGA-based Accelerator for Edge Vision Transformers

Hubert Dymarkowski, Xingjian Fu, Rappy Saha +2

Deploying Vision Transformer (ViT) models on edge platforms remains challenging due to their high computational demands and the architectural heterogeneity of modern hybrid ViT mod…

cs.AR2025

F-BFQ: Flexible Block Floating-Point Quantization Accelerator for LLMs

Jude Haris, José Cano

Large Language Models (LLMs) have become increasingly prominent for daily tasks, from improving sound-totext translation to generating additional frames for the latest video games.…

cs.AR2025

Accelerating Transposed Convolutions on FPGA-based Edge Devices

Jude Haris, José Cano

Transposed Convolutions (TCONV) enable the up-scaling mechanism within generative Artificial Intelligence (AI) models. However, the predominant Input-Oriented Mapping (IOM) method…

cs.LG2025

ICE-Pruning: An Iterative Cost-Efficient Pruning Pipeline for Deep Neural Networks

Wenhao Hu, Paul Henderson, José Cano

Pruning is a widely used method for compressing Deep Neural Networks (DNNs), where less relevant parameters are removed from a DNN model to reduce its size. However, removing param…

cs.LG2025

Quantitative Analysis of Deeply Quantized Tiny Neural Networks Robust to Adversarial Attacks

Idris Zakariyya, Ferheen Ayaz, Mounia Kharbouche-Harrari +4

Reducing the memory footprint of Machine Learning (ML) models, especially Deep Neural Networks (DNNs), is imperative to facilitate their deployment on resource-constrained edge dev…

cs.LG2024

DQA: An Efficient Method for Deep Quantization of Deep Neural Network Activations

Wenhao Hu, Paul Henderson, José Cano

Quantization of Deep Neural Network (DNN) activations is a commonly used technique to reduce compute and memory demands during DNN inference, which can be particularly beneficial o…

cs.AR2024

Accelerating PoT Quantization on Edge Devices

Rappy Saha, Jude Haris, José Cano

Non-uniform quantization, such as power-of-two (PoT) quantization, matches data distributions better than uniform quantization, which reduces the quantization error of Deep Neural…

cs.AR2024★ 4 cited

Designing Efficient LLM Accelerators for Edge Devices

Jude Haris, Rappy Saha, Wenhao Hu +1

The increase in open-source availability of Large Language Models (LLMs) has enabled users to deploy them on more and more resource-constrained edge devices to reduce reliance on n…

cs.PL2024

Data Transfer Optimizations for Host-CPU and Accelerators in AXI4MLIR

Jude Haris, Nicolas Bohm Agostini, Antonino Tumeo +2

As custom hardware accelerators become more prevalent, it becomes increasingly important to automatically generate efficient host-driver code that can fully leverage the capabiliti…