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Striking the Balance: GEMM Performance Optimization Across Generations of Ryzen AI NPUs
Endri Taka, Andre Roesti, Joseph Melber +3
The high computational and memory demands of modern deep learning (DL) workloads have led to the development of specialized hardware devices from cloud to edge, such as AMD's Ryzen…
Can Asymmetric Tile Buffering Be Beneficial?
Chengyue Wang, Wesley Pang, Xinrui Wu +9
General matrix multiplication (GEMM) is the computational backbone of modern AI workloads, and its efficiency is critically dependent on effective tiling strategies. Conventional a…
From Loop Nests to Silicon: Mapping AI Workloads onto AMD NPUs with MLIR-AIR
Erwei Wang, Samuel Bayliss, Andra Bisca +19
General-purpose compilers abstract away parallelism, locality, and synchronization, limiting their effectiveness on modern spatial architectures. As modern computing architectures…
Efficiency, Expressivity, and Extensibility in a Close-to-Metal NPU Programming Interface
Erika Hunhoff, Joseph Melber, Kristof Denolf +8
Accelerators such as neural processing units (NPUs) deliver an enticing balance of performance and efficiency compared to general purpose compute architectures. However, effectivel…