most citedLow latency FPGA implementation of twisted Edward curve cryptography hardware accelerator over prime field

5 citations · 5 across the 1 of their papers we have counts for

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1 paper

cs.CR2025★ 5 cited

Low latency FPGA implementation of twisted Edward curve cryptography hardware accelerator over prime field

Md Rownak Hossain, Md Sazedur Rahman, Kh Shahriya Zaman +5

The performance of any elliptic curve cryptography hardware accelerator significantly relies on the efficiency of the underlying point multiplication (PM) architecture. This articl…