3 papers
cs.SE2026
UCAgent: An End-to-End Agent for Block-Level Functional Verification
Junyue Wang, Zhicheng Yao, Yan Pi +6
Functional verification remains a critical bottleneck in modern IC development cycles, accounting for approximately 70% of total development time in many projects. However, traditi…
cs.AI2025
ChiseLLM: Unleashing the Power of Reasoning LLMs for Chisel Agile Hardware Development
Bowei Wang, Jiaran Gao, Yelai Feng +3
The growing demand for Domain-Specific Architecture (DSA) has driven the development of Agile Hardware Development Methodology (AHDM). Hardware Construction Language (HCL) like Chi…
cs.AR2025
RTLSquad: Multi-Agent Based Interpretable RTL Design
Bowei Wang, Qi Xiong, Zeqing Xiang +2
Optimizing Register-Transfer Level (RTL) code is crucial for improving hardware PPA performance. Large Language Models (LLMs) offer new approaches for automatic RTL code generation…