3 papers
cs.AR2026
SparseCraft: Agentic Hardware-Software Co-Optimization for Sparse Computing
Rajatabha Chakraborty, M P Samartha, Vedant Pahariya +1
Sparse-accelerator design spaces are usually searched against analytical models, so a design point is admitted on what a model predicts rather than on what the hardware does. Spars…
cs.CR2025
PUFBind: PUF-Enabled Lightweight Program Binary Authentication for FPGA-based Embedded Systems
Sneha Swaroopa, Venkata Sreekanth Balijabudda, Rajat Subhra Chakraborty +1
Field Programmable Gate Array (FPGA)-based embedded systems have become mainstream in the last decade, often in security-sensitive applications. However, even with an authenticated…
cs.AR2024
Evaluating Large Language Models for Automatic Register Transfer Logic Generation via High-Level Synthesis
Sneha Swaroopa, Rijoy Mukherjee, Anushka Debnath +1
The ever-growing popularity of large language models (LLMs) has resulted in their increasing adoption for hardware design and verification. Prior research has attempted to assess t…