2 citations · 3 across the 12 of their papers we have counts for
6 papers · 1 filter
AQPIM: Breaking the PIM Capacity Wall for LLMs with In-Memory Activation Quantization
Kosuke Matsushima, Yasuyuki Okoshi, Masato Motomura +1
Processing-in-Memory (PIM) architectures offer a promising solution to the memory bottlenecks in data-intensive machine learning, yet often overlook the growing challenge of activa…
DX100: A Programmable Data Access Accelerator for Indirection
Alireza Khadem, Kamalavasan Kamalakkannan, Zhenyan Zhu +8
Indirect memory accesses frequently appear in applications where memory bandwidth is a critical bottleneck. Prior indirect memory access proposals, such as indirect prefetchers, ru…
Multi-Dimensional Vector ISA Extension for Mobile In-Cache Computing
Alireza Khadem, Daichi Fujiki, Hilbert Chen +4
In-cache computing technology transforms existing caches into long-vector compute units and offers low-cost alternatives to building expensive vector engines for mobile CPUs. Unfor…
HALO-CAT: A Hidden Network Processor with Activation-Localized CIM Architecture and Layer-Penetrative Tiling
Yung-Chin Chen, Shimpei Ando, Daichi Fujiki +2
To address the 'memory wall' problem in NN hardware acceleration, we introduce HALO-CAT, a software-hardware co-design optimized for Hidden Neural Network (HNN) processing. HALO-CA…
Vector-Processing for Mobile Devices: Benchmark and Analysis
Alireza Khadem, Daichi Fujiki, Nishil Talati +2
Vector processing has become commonplace in today's CPU microarchitectures. Vector instructions improve performance and energy which is crucial for resource-constraint mobile devic…
OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration
Yung-Chin Chen, Shimpei Ando, Daichi Fujiki +2
Computing-in-Memory (CIM) has shown great potential for enhancing efficiency and performance for deep neural networks (DNNs). However, the lack of flexibility in CIM leads to an un…