19 citations · 43 across the 12 of their papers we have counts for
4 papers · 1 filter
IndexMAC: A Custom RISC-V Vector Instruction to Accelerate Structured-Sparse Matrix Multiplications
V. Titopoulos, K. Alexandridis, C. Peltekis +2
Structured sparsity has been proposed as an efficient way to prune the complexity of modern Machine Learning (ML) applications and to simplify the handling of sparse data in hardwa…
The Case for Asymmetric Systolic Array Floorplanning
C. Peltekis, D. Filippas, G. Dimitrakopoulos +1
The widespread proliferation of deep learning applications has triggered the need to accelerate them directly in hardware. General Matrix Multiplication (GEMM) kernels are elementa…
Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating
C. Peltekis, D. Filippas, G. Dimitrakopoulos +1
Systolic Array (SA) architectures are well suited for accelerating matrix multiplications through the use of a pipelined array of Processing Elements (PEs) communicating with local…
Reduced-Precision Floating-Point Arithmetic in Systolic Arrays with Skewed Pipelines
D. Filippas, C. Peltekis, G. Dimitrakopoulos +1
The acceleration of deep-learning kernels in hardware relies on matrix multiplications that are executed efficiently on Systolic Arrays (SA). To effectively trade off deep-learning…