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20242026
most citedTensorTEE: Unifying Heterogeneous TEE Granularity for Efficient Secure Collaborative Tensor Computing

12 citations · 19 across the 12 of their papers we have counts for

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Showing 2025Show all

8 papers · 1 filter

cs.LG2025

QiMeng-CRUX: Narrowing the Gap Between Natural Language and Verilog via Core Refined Understanding eXpression for Circuit Design

Lei Huang, Rui Zhang, Jiaming Guo +9

Large language models (LLMs) have shown promising capabilities in hardware description language (HDL) generation. However, existing approaches often rely on free-form natural langu…

cs.LG2025

QiMeng-SALV: Signal-Aware Learning for Verilog Code Generation

Yang Zhang, Rui Zhang, Jiaming Guo +10

The remarkable progress of Large Language Models (LLMs) presents promising opportunities for Verilog code generation which is significantly important for automated circuit design.…

cs.LG2025★ 1 cited

RealBench: Benchmarking Verilog Generation Models with Real-World IP Designs

Pengwei Jin, Di Huang, Chongxiao Li +10

The automatic generation of Verilog code using Large Language Models (LLMs) has garnered significant interest in hardware design automation. However, existing benchmarks for evalua…

cs.AR2025

QiMeng: Fully Automated Hardware and Software Design for Processor Chip

Rui Zhang, Yuanbo Wen, Shuyao Cheng +17

Processor chip design technology serves as a key frontier driving breakthroughs in computer science and related fields. With the rapid advancement of information technology, conven…

cs.AR2025

Large Processor Chip Model

Kaiyan Chang, Mingzhi Chen, Yunji Chen +40

Computer System Architecture serves as a crucial bridge between software applications and the underlying hardware, encompassing components like compilers, CPUs, coprocessors, and R…

cs.AR2025

QiMeng-CPU-v2: Automated Superscalar Processor Design by Learning Data Dependencies

Shuyao Cheng, Rui Zhang, Wenkai He +10

Automated processor design, which can significantly reduce human efforts and accelerate design cycles, has received considerable attention. While recent advancements have automatic…

cs.LG2025★ 1 cited

QiMeng-CodeV-R1: Reasoning-Enhanced Verilog Generation

Yaoyu Zhu, Di Huang, Hanqi Lyu +16

Large language models (LLMs) trained via reinforcement learning with verifiable reward (RLVR) have achieved breakthroughs on tasks with explicit, automatable verification, such as…

cs.AR2025

AGON: Automated Design Framework for Customizing Processors from ISA Documents

Chongxiao Li, Di Huang, Pengwei Jin +12

Customized processors are attractive solutions for vast domain-specific applications due to their high energy efficiency. However, designing a processor in traditional flows is tim…