14 citations · 16 across the 12 of their papers we have counts for
6 papers · 1 filter
CITADEL: CWE-Guided Insertion of Hardware Trojans via Analysis of DFG-Enabled LLMs
Jayanth Thangellamudi, Raghul Saravanan, Sudipta Paria +2
The increasing sophistication of Hardware Trojans (HTs) and system-level vulnerabilities poses significant risks to modern integrated circuits. However, constructing realistic HT s…
Security-Enhanced Seed-Based Weight Quantization for Large Language Models
Qiuyu Ren, Sudipta Paria, Aritra Dasgupta +1
Large language models (LLMs) incur substantial storage, memory-bandwidth and energy costs, motivating compact weight representations. Existing seed-based compression methods recons…
Lessons from the Hardware Hacking Competitions: Verification Techniques, Findings, and Insights
Sudipta Paria, Aritra Dasgupta, Raghul Saravanan +3
Hardware hacking competitions have emerged as practical platforms for evaluating security weaknesses in complex System-on-Chip (SoC) designs while promoting security-aware verifica…
An Automated Framework for Generating Stealthy Cell-Embedded Hardware Trojans
Raghul Saravanan, Sudipta Paria, Sai Manoj P D +1
Hardware Trojans (HTs) pose significant threats across the Integrated Circuit (IC) design lifecycle because they can be inserted by untrusted entities at different stages under the…
CIPHR: Cryptography Inspired IP Protection through Fine-Grain Hardware Redaction
Aritra Dasgupta, Sudipta Paria, Swarup Bhunia
Hardware intellectual property (IP) in the globalized integrated circuit (IC) supply chain is exposed to a wide range of confidentiality and integrity attacks by untrusted third-pa…
COVERT: Trojan Detection in COTS Hardware via Statistical Activation of Microarchitectural Events
Mahmudul Hasan, Sudipta Paria, Swarup Bhunia +1
Commercial Off-The-Shelf (COTS) hardware, such as microprocessors, are widely adopted in system design due to their ability to reduce development time and cost compared to custom s…