1 citations · 1 across the 3 of their papers we have counts for
5 papers
Intelligent Graybox Fuzzing via ATPG-Guided Seed Generation and Submodule Analysis
Raghul Saravanan, Sudipta Paria, Aritra Dasgupta +2
Hardware Fuzzing emerged as one of the crucial techniques for finding security flaws in modern hardware designs by testing a wide range of input scenarios. One of the main challeng…
LASA: Enhancing SoC Security Verification with LLM-Aided Property Generation
Dinesh Reddy Ankireddy, Sudipta Paria, Aritra Dasgupta +2
Ensuring the security of modern System-on-Chip (SoC) designs poses significant challenges due to increasing complexity and distributed assets across the intellectual property (IP)…
Enhancing Test Efficiency through Automated ATPG-Aware Lightweight Scan Instrumentation
Sudipta Paria, Md Rezoan Ferdous, Aritra Dasgupta +2
Scan-based Design-for-Testability (DFT) measures are prevalent in modern digital integrated circuits to achieve high test quality at low hardware cost. With the advent of 3D hetero…
SynFuzz: Leveraging Fuzzing of Netlist to Detect Synthesis Bugs
Raghul Saravanan, Sudipta Paria, Aritra Dasgupta +3
In the evolving landscape of integrated circuit (IC) design, the increasing complexity of modern processors and intellectual property (IP) cores has introduced new challenges in en…
Library-Attack: Reverse Engineering Approach for Evaluating Hardware IP Protection
Aritra Dasgupta, Sudipta Paria, Christopher Sozio +2
Existing countermeasures for hardware IP protection, such as obfuscation, camouflaging, and redaction, aim to defend against confidentiality and integrity attacks. However, within…