4 citations · 11 across the 5 of their papers we have counts for
3 papers · 1 filter
CorrectBench: Automatic Testbench Generation with Functional Self-Correction using LLMs for HDL Design
Ruidi Qiu, Grace Li Zhang, Rolf Drechsler +2
Functional simulation is an essential step in digital hardware design. Recently, there has been a growing interest in leveraging Large Language Models (LLMs) for hardware testbench…
LLM-Aided Efficient Hardware Design Automation
Kangwei Xu, Ruidi Qiu, Zhuorui Zhao +3
With the rapidly increasing complexity of modern chips, hardware engineers are required to invest more effort in tasks such as circuit design, verification, and physical implementa…
AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design
Ruidi Qiu, Grace Li Zhang, Rolf Drechsler +2
In digital circuit design, testbenches constitute the cornerstone of simulation-based hardware verification. Traditional methodologies for testbench generation during simulation-ba…