3 citations · 3 across the 6 of their papers we have counts for
6 papers
Sparse Convolutional Recurrent Learning for Efficient Event-based Neuromorphic Object Detection
Shenqi Wang, Yingfu Xu, Amirreza Yousefzadeh +4
Leveraging the high temporal resolution and dynamic range, object detection with event cameras can enhance the performance and safety of automotive and robotics applications in rea…
STEMS: Spatial-Temporal Mapping For Spiking Neural Networks
Sherif Eissa, Sander Stuijk, Floran De Putter +3
Spiking Neural Networks (SNNs) are promising bio-inspired third-generation neural networks. Recent research has trained deep SNN models with accuracy on par with Artificial Neural…
Efficient Synaptic Delay Implementation in Digital Event-Driven AI Accelerators
Roy Meijer, Paul Detterer, Amirreza Yousefzadeh +8
Synaptic delay parameterization of neural network models have remained largely unexplored but recent literature has been showing promising results, suggesting the delay parameteriz…
Hardware-In-The-Loop Training of a 4f Optical Correlator with Logarithmic Complexity Reduction for CNNs
Lorenzo Pes, Maryam Dehbashizadeh Chehreghan, Rick Luiken +3
This work evaluates a forward-only learning algorithm on the MNIST dataset with hardware-in-the-loop training of a 4f optical correlator, achieving 87.6% accuracy with O(n2) comple…
Hardware-aware training of models with synaptic delays for digital event-driven neuromorphic processors
Alberto Patino-Saucedo, Roy Meijer, Amirreza Yousefzadeh +6
Configurable synaptic delays are a basic feature in many neuromorphic neural network hardware accelerators. However, they have been rarely used in model implementations, despite th…
CONVOLVE: Smart and seamless design of smart edge processors
M. Gomony, F. Putter, A. Gebregiorgis +25
With the rise of Deep Learning (DL), our world braces for AI in every edge device, creating an urgent need for edge-AI SoCs. This SoC hardware needs to support high throughput, rel…