2 papers
cond-mat.mes-hall2026
Unveiling the Scaling Potential of Drain Merge through Active (DMtA) in CFETs: Breaking the Super-Via Bottlenecks and Unlocking New PPA Boosters
Jingru Jiang, Haoran Lu, Kairong Guo +11
Drain merge (DM), a super via vertically connecting the common S/D terminals of stacked n/pFETs in Complementary FETs (CFETs), blocks further parasitic optimization and cell scalin…
cond-mat.mes-hall2025
Overlay-aware Variation Study of Flip FET and Benchmark with CFET
Wanyue Peng, Haoran Lu, Jingru Jiang +5
In this work, we carried out an overlay-aware variation study on Flip FET (FFET) considering the impact on RC parasitics induced by the lithography misalignment in backside process…