activity
20242026
collaborators

8 papers

cs.AI2026

LOADBench: A Large Open Analog Dataset and Benchmark for Machine Learning in IC Design

M. Leibl, F. Azevedo, S. Uhlich +7

Machine learning (ML) for analog IC design is constrained by limited open data and the absence of standardized evaluation: results reported in different papers are typically obtain…

cs.NE2026

Spicing up Genetic Netlist Generation with LLMs

Stefan Uhlich, Yağız Gençer, Andrea Bonetti +4

Analog circuit topology synthesis remains challenging because useful designs occupy a tiny fraction of a combinatorial search space, and small structural changes can induce highly…

cs.NE2026

SPECS: Speciated Evolutionary Circuit Synthesis

Yağız Gençer, Stefan Uhlich, Andrea Bonetti +3

We propose SPECS, a genetic algorithm for automated analog circuit synthesis with joint topology and sizing optimization. SPECS is inspired by NeuroEvolution of Augmenting Topologi…

cs.LG2026

Lighthouse RL: Sample-Efficient Circuit Optimization via Strategic Reset Points

Mustafa Emre Gürsoy, Stefan Uhlich, Ryoga Matsuo +6

In this paper, we introduce Lighthouse RL, a sample-efficient reinforcement learning (RL) approach for analog circuit sizing. Traditional methods lack generalization across differe…

cs.AR2025

GENIE-ASI: Generative Instruction and Executable Code for Analog Subcircuit Identification

Phuoc Pham, Arun Venkitaraman, Chia-Yu Hsieh +8

Analog subcircuit identification is a core task in analog design, essential for simulation, sizing, and layout. Traditional methods often require extensive human expertise, rule-ba…

cs.LG2025

Locality-aware Surrogates for Gradient-based Black-box Optimization

Ali Momeni, Stefan Uhlich, Arun Venkitaraman +5

In physics and engineering, many processes are modeled using non-differentiable black-box simulators, making the optimization of such functions particularly challenging. To address…

cs.LG2024

Schemato -- An LLM for Netlist-to-Schematic Conversion

Ryoga Matsuo, Stefan Uhlich, Arun Venkitaraman +7

Machine learning models are advancing circuit design, particularly in analog circuits. They typically generate netlists that lack human interpretability. This is a problem as human…

cs.LG2024

GraCo -- A Graph Composer for Integrated Circuits

Stefan Uhlich, Andrea Bonetti, Arun Venkitaraman +5

Designing integrated circuits involves substantial complexity, posing challenges in revealing its potential applications - from custom digital cells to analog circuits. Despite ext…