21 citations · 51 across the 20 of their papers we have counts for
6 papers · 1 filter
Network Design for Wafer-Scale Systems with Wafer-on-Wafer Hybrid Bonding
Patrick Iff, Tommaso Bonato, Maciej Besta +2
Transformer-based large language models are increasingly constrained by data movement as communication bandwidth drops sharply beyond the chip boundary. Wafer-scale integration usi…
FoldedHexaTorus: An Inter-Chiplet Interconnect Topology for Chiplet-based Systems using Organic and Glass Substrates
Patrick Iff, Maciej Besta, Torsten Hoefler
Chiplet-based systems are rapidly gaining traction in the market. Two packaging options for such systems are the established organic substrates and the emerging glass substrates. T…
PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies
Patrick Iff, Benigna Bruggmann, Maciej Besta +2
2.5D integration technology is gaining traction as it copes with the exponentially growing design cost of modern integrated circuits. A crucial part of a 2.5D stacked chip is a low…
RapidChiplet: A Toolchain for Rapid Design Space Exploration of Chiplet Architectures
Patrick Iff, Benigna Bruggmann, Blaise Morel +3
Chiplet architectures are on the rise as they promise to overcome the scaling challenges of monolithic chips. A key component of such architectures is an efficient inter-chiplet in…
HexaMesh: Scaling to Hundreds of Chiplets with an Optimized Chiplet Arrangement
Patrick Iff, Maciej Besta, Matheus Cavalcante +3
2.5D integration is an important technique to tackle the growing cost of manufacturing chips in advanced technology nodes. This poses the challenge of providing high-performance in…
Sparse Hamming Graph: A Customizable Network-on-Chip Topology
Patrick Iff, Maciej Besta, Matheus Cavalcante +3
Chips with hundreds to thousands of cores require scalable networks-on-chip (NoCs). Customization of the NoC topology is necessary to reach the diverse design goals of different ch…