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cs.AR2026
AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator
Chenhao Xue, Yukun Wang, An Guo +11
SRAM-based compute-in-memory (CIM) offers high computational density and energy efficiency for deep neural network (DNN) accelerators, but its limited capacity causes on/off-chip d…
cs.AR2026
CellE: Automated Standard Cell Library Extension via Equality Saturation
Yi Ren, Yukun Wang, Xiang Meng +6
Automated standard cell library extension is crucial for maximizing Quality of Results (QoR) in modern VLSI design. We introduce CellE, a novel framework that leverages formal meth…
cs.AR2025
Orthrus: Dual-Loop Automated Framework for System-Technology Co-Optimization
Yi Ren, Baokang Peng, Chenhao Xue +6
With the diminishing return from Moore's Law, system-technology co-optimization (STCO) has emerged as a promising approach to sustain the scaling trends in the VLSI industry. By br…