activity
20242026
collaborators

5 papers

cs.AR2026

An Open-Source Standard-Cell Library for IHP 130nm Developed by Students

Oscar Castañeda, Lavinia Recchioni, Tobias Senti +26

Standard-cell libraries form the critical interface between transistor-level circuit design and automated digital design flows, yet their design and characterization are rarely cov…

cs.AR2025

A 14ns-Latency 9Gb/s 0.44mm 62pJ/b Short-Blocklength LDPC Decoder ASIC in 22FDX

Darja Nonaca, Jérémy Guichemerre, Reinhard Wiesmayr +2

Ultra-reliable low latency communication (URLLC) is a key part of 5G wireless systems. Achieving low latency necessitates codes with short blocklengths for which polar codes with s…

eess.SP2025

Fixed-Throughput GRAND with FIFO Scheduling

Filippo Christen, Darja Nonaca, Christoph Studer

Guessing random additive noise decoding (GRAND) is a code-agnostic decoding method that iteratively guesses the noise pattern affecting the received codeword. The number of noise s…

cs.IT2024

Optimizing Puncturing Patterns of 5G NR LDPC Codes for Few-Iteration Decoding

Reinhard Wiesmayr, Darja Nonaca, Chris Dick +1

Rate-matching of low-density parity-check (LDPC) codes enables a single code description to support a wide range of code lengths and rates. In 5G NR, rate matching is accomplished…

eess.SP2024

A 1.2 mm 416 mW 1.44 Mmat/s 6416 Matrix Preprocessing ASIC for Massive MIMO in 22FDX

Darja Nonaca, Christoph Studer

Massive multiuser (MU) multiple-input multiple-output (MIMO) enables concurrent transmission of multiple users to a multi-antenna basestation (BS). To detect the users' data using…