5 citations · 20 across the 34 of their papers we have counts for
8 papers · 1 filter
ExaGEMM: Exploration Framework for CPU-Driven ML Inference via Associative In-Register Computing for Low-Bit GEMM
Hyunwoo Oh, Suyeon Jang, Hanning Chen +3
Low-bit GEMM is increasingly central to efficient ML inference, yet very-low-bit execution remains a poor fit for conventional CPUs. Practical deployment spans fragmented regimes-f…
TRINE: A Token-Aware, Runtime-Adaptive FPGA Inference Engine for Multimodal AI
Hyunwoo Oh, Hanning Chen, Sanggeon Yun +5
Multimodal stacks that mix ViTs, CNNs, GNNs, and transformer NLP strain embedded platforms because their compute/memory patterns diverge and hard real-time targets leave little sla…
TorR: Towards Brain-Inspired Task-Oriented Reasoning via Cache-Oriented Algorithm-Architecture Co-design
Hyunwoo Oh, SungHeon Jeong, Suyeon Jang +4
Task-oriented object detection (TOOD) atop CLIP offers open-vocabulary, prompt-driven semantics, yet dense per-window computation and heavy memory traffic hinder real-time, power-l…
QUILL: An Algorithm-Architecture Co-Design for Cache-Local Deformable Attention
Hyunwoo Oh, Hanning Chen, Sanggeon Yun +5
Deformable transformers deliver state-of-the-art detection but map poorly to hardware due to irregular memory access and low arithmetic intensity. We introduce QUILL, a schedule-aw…
T-SAR: A Full-Stack Co-design for CPU-Only Ternary LLM Inference via In-Place SIMD ALU Reorganization
Hyunwoo Oh, KyungIn Nam, Rajat Bhattacharjya +7
Recent advances in LLMs have outpaced the computational and memory capacities of edge platforms that primarily employ CPUs, thereby challenging efficient and scalable deployment. W…
HDReason: Algorithm-Hardware Codesign for Hyperdimensional Knowledge Graph Reasoning
Hanning Chen, Yang Ni, Ali Zakeri +7
In recent times, a plethora of hardware accelerators have been put forth for graph learning applications such as vertex classification and graph classification. However, previous w…
HyperSense: Hyperdimensional Intelligent Sensing for Energy-Efficient Sparse Data Processing
Sanggeon Yun, Hanning Chen, Ryozo Masukawa +6
Introducing HyperSense, our co-designed hardware and software system efficiently controls Analog-to-Digital Converter (ADC) modules' data generation rate based on object presence p…
SEE-MCAM: Scalable Multi-bit FeFET Content Addressable Memories for Energy Efficient Associative Search
Shengxi Shou, Che-Kai Liu, Sanggeon Yun +7
In this work, we propose SEE-MCAM, scalable and compact multi-bit CAM (MCAM) designs that utilize the three-terminal ferroelectric FET (FeFET) as the proxy. By exploiting the multi…