A Novel Quaternary Decoder Design Utilizing 32nm CMOS and GNRFET Technology for Enhanced High-Density Memory Applications

Anindita Chattopadhyay, Pooja Desai, Vishwas P +1

Multi-Valued Logic (MVL) has more than one logic level defined to represent data whereas binary logic has 2 logic levels. It has been shown that the MVL circuits use the circuit re…