49 citations · 115 across the 14 of their papers we have counts for
14 papers
Venice: Improving Solid-State Drive Parallelism at Low Cost via Conflict-Free Accesses
Rakesh Nadig, Mohammad Sadrosadati, Haiyu Mao +6
The performance and capacity of solid-state drives (SSDs) are continuously improving to meet the increasing demands of modern data-intensive applications. Unfortunately, communicat…
Morpheus: Extending the Last Level Cache Capacity in GPU Systems Using Idle GPU Core Resources
Sina Darabi, Mohammad Sadrosadati, Joël Lindegger +6
Graphics Processing Units (GPUs) are widely-used accelerators for data-parallel applications. In many GPU applications, GPU memory bandwidth bottlenecks performance, causing underu…
A simple model for citation curve
Y. C. Tay, Mostafa Rezazad, Hamid Sarbazi-Azad
There is considerable interest in the citation count for an author's publications. This has led to many proposals for citation indices for characterizing citation distributions. Ho…
MANA: Microarchitecting an Instruction Prefetcher
Ali Ansari, Fatemeh Golshan, Pejman Lotfi-Kamran +1
L1 instruction (L1-I) cache misses are a source of performance bottleneck. Sequential prefetchers are simple solutions to mitigate this problem; however, prior work has shown that…
Understanding Power Consumption and Reliability of High-Bandwidth Memory with Voltage Underscaling
Seyed Saber Nabavi Larimi, Behzad Salami, Osman S. Unsal +3
Modern computing devices employ High-Bandwidth Memory (HBM) to meet their memory bandwidth requirements. An HBM-enabled device consists of multiple DRAM layers stacked on top of on…
Enabling High-Capacity, Latency-Tolerant, and Highly-Concurrent GPU Register Files via Software/Hardware Cooperation
Mohammad Sadrosadati, Amirhossein Mirhosseini, Ali Hajiabadi +7
Graphics Processing Units (GPUs) employ large register files to accommodate all active threads and accelerate context switching. Unfortunately, register files are a scalability bot…