686 citations · 1.5k across the 39 of their papers we have counts for
5 papers · 1 filter
Partial Reversible Gates(PRG) for Reversible BCD Arithmetic
Himanshu Thapliyal, Hamid R. Arabnia, Rajnish Bajpai +1
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. Furthermore, in the recent year…
Combined Integer and Variable Precision (CIVP) Floating Point Multiplication Architecture for FPGAs
Himanshu Thapliyal, Hamid R. Arabnia, Rajnish Bajpai +1
In this paper, we propose an architecture/methodology for making FPGAs suitable for integer as well as variable precision floating point multiplication. The proposed work will of g…
Combined Integer and Floating Point Multiplication Architecture(CIFM) for FPGAs and Its Reversible Logic Implementation
Himanshu Thapliyal, Hamid R. Arabnia, A. P Vinod
In this paper, the authors propose the idea of a combined integer and floating point multiplier(CIFM) for FPGAs. The authors propose the replacement of existing 18x18 dedicated mul…
Reduced Area Low Power High Throughput BCD Adders for IEEE 754r Format
Himanshu Thapliyal, Hamid R. Arabnia, M. B Srinivas
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. Firstly, this paper proposes no…
Reversible Programmable Logic Array (RPLA) using Fredkin & Feynman Gates for Industrial Electronics and Applications
Himanshu Thapliyal, Hamid R. Arabnia
In recent years, reversible logic has emerged as a promising computing paradigm having application in low power CMOS, quantum computing, nanotechnology, and optical computing. The…