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20232025
most citedA Review of SRAM-based Compute-in-Memory Circuits

21 citations · 34 across the 6 of their papers we have counts for

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cs.AR2025

BitROM: Weight Reload-Free CiROM Architecture Towards Billion-Parameter 1.58-bit LLM Inference

Wenlun Zhang, Xinyu Li, Shimpei Ando +1

Compute-in-Read-Only-Memory (CiROM) accelerators offer outstanding energy efficiency for CNNs by eliminating runtime weight updates. However, their scalability to Large Language Mo…

cs.AR202421 cited

A Review of SRAM-based Compute-in-Memory Circuits

Kentaro Yoshioka, Shimpei Ando, Satomi Miyagi +2

This paper presents a tutorial and review of SRAM-based Compute-in-Memory (CIM) circuits, with a focus on both Digital CIM (DCIM) and Analog CIM (ACIM) implementations. We explore…

cs.AR2024

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits

Wenlun Zhang, Shimpei Ando, Yung-Chin Chen +1

SRAM-based Analog Compute-in-Memory (ACiM) demonstrates promising energy efficiency for deep neural network (DNN) processing. Nevertheless, efforts to optimize efficiency frequentl…

cs.AR20243 cited

PACiM: A Sparsity-Centric Hybrid Compute-in-Memory Architecture via Probabilistic Approximation

Wenlun Zhang, Shimpei Ando, Yung-Chin Chen +3

Approximate computing emerges as a promising approach to enhance the efficiency of compute-in-memory (CiM) systems in deep neural network processing. However, traditional approxima…

cs.AR2023

HALO-CAT: A Hidden Network Processor with Activation-Localized CIM Architecture and Layer-Penetrative Tiling

Yung-Chin Chen, Shimpei Ando, Daichi Fujiki +2

To address the 'memory wall' problem in NN hardware acceleration, we introduce HALO-CAT, a software-hardware co-design optimized for Hidden Neural Network (HNN) processing. HALO-CA…