1 citations · 1 across the 3 of their papers we have counts for
3 papers
cs.AR2025
GATMesh: Clock Mesh Timing Analysis using Graph Neural Networks
Muhammad Hadir Khan, Matthew Guthaus
Clock meshes are essential in high-performance VLSI systems for minimizing skew and handling PVT variations, but analyzing them is difficult due to reconvergent paths, multi-source…
cs.AR2024★ 1 cited
VLSI Hypergraph Partitioning with Deep Learning
Muhammad Hadir Khan, Bugra Onal, Eren Dogan +1
Partitioning is a known problem in computer science and is critical in chip design workflows, as advancements in this area can significantly influence design quality and efficiency…
cs.LG2024
GAT-Steiner: Rectilinear Steiner Minimal Tree Prediction Using GNNs
Bugra Onal, Eren Dogan, Muhammad Hadir Khan +1
The Rectilinear Steiner Minimum Tree (RSMT) problem is a fundamental problem in VLSI placement and routing and is known to be NP-hard. Traditional RSMT algorithms spend a significa…