4 citations · 5 across the 8 of their papers we have counts for
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cs.AR2024★ 1 cited
RTLRewriter: Methodologies for Large Models aided RTL Code Optimization
Xufeng Yao, Yiwen Wang, Xing Li +6
Register Transfer Level (RTL) code optimization is crucial for enhancing the efficiency and performance of digital circuits during early synthesis stages. Currently, optimization r…
cs.AR2024★ 4 cited
HDLdebugger: Streamlining HDL debugging with Large Language Models
Xufeng Yao, Haoyang Li, Tsz Ho Chan +5
In the domain of chip design, Hardware Description Languages (HDLs) play a pivotal role. However, due to the complex syntax of HDLs and the limited availability of online resources…
cs.CL2024
ChatPattern: Layout Pattern Customization via Natural Language
Zixiao Wang, Yunheng Shen, Xufeng Yao +4
Existing works focus on fixed-size layout pattern generation, while the more practical free-size pattern generation receives limited attention. In this paper, we propose ChatPatter…