9 papers
RIVERPlace: Repairing Interconnect Violations with Efficient Retiming and Incremental Placement for AQFP Circuits
Robert S. Aviles, Ziyu Liu, Sasan Razmkhah +2
The Adiabatic Quantum-Flux-Parametron (AQFP) offers near-Landauer-limit energy efficiency but faces significant scalability challenges due to strict path balancing and limited driv…
Bridging AQFP Technology Legalization and Physical Design: Layout-Aware Buffer and Splitter Insertion via Width--Depth Product Minimization
Robert S. Aviles, Ziyu Liu, Madhav Danturthi +1
Adiabatic Quantum Flux Parametron (AQFP) is an emerging superconducting technology that enables ultra-low energy dissipation approaching the Shannon limit. However, its gate-level…
qPRO-AQFP: Post-Routing Optimization of AQFP Circuits with Delay Line Clocking
Robert S. Aviles, Ziyu Liu, Jingkai Hong +3
Adiabatic Quantum-Flux-Parametron (AQFP) logic is an ultra-low-power superconducting logic family with energy consumption approaching the Shannon limit, making it attractive for qu…
Exciton dynamics and high-temperature excitonic superfluidity in S-doped graphyne
Enesio Marinho, Alexandre C. Dias, Luiz A. Ribeiro +2
S-doped graphyne (S-GY) is a recently synthesized two-dimensional graphyne-based carbon allotrope that provides a promising platform for exciton engineering and coherent many-body…
Optimizing Phase-Scheduling with Throughput Trade-offs in AQFP Digital Circuits
Robert S. Aviles, Peter A. Beerel
Adiabatic Quantum-Flux-Parametron (AQFP) logic is a promising emerging superconducting technology for ultra-low power digital circuits, offering orders of magnitude lower power con…
SCE-NTT: A Hardware Accelerator for Number Theoretic Transform Using Superconductor Electronics
Sasan Razmkhah, Mingye Li, Zeming Cheng +13
This research explores the use of superconductor electronics (SCE) for accelerating fully homomorphic encryption (FHE), focusing on the Number-Theoretic Transform (NTT), a key comp…
Delay Balancing with Clock-Follow-Data: Optimizing Area Delay Trade-offs for Robust Rapid Single Flux Quantum Circuits
Robert S. Aviles, Phalgun G K, Peter A. Beerel
This paper proposes an algorithm for synthesis of clock-follow-data designs that provides robustness against timing violations for RSFQ circuits while maintaining high performance…
An Efficient and Scalable Clocking Assignment Algorithm for Multi-Threaded Multi-Phase Single Flux Quantum Circuits
Robert S. Aviles, Xi Li, Lei Lu +2
A key distinguishing feature of single flux quantum (SFQ) circuits is that each logic gate is clocked. This feature forces the introduction of path-balancing flip-flops to ensure p…
A Joint Optimization of Buffer and Splitter Insertion for Phase-Skipping Adiabatic Quantum-Flux-Parametron Circuits
Robert S. Aviles, Peter A. Beerel
Adiabatic Quantum-Flux-Parametron (AQFP) logic is a promising emerging device technology with six orders of magnitude lower power than CMOS. However, AQFP is challenged by the fact…