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20242026
most citedECG Biometric Authentication Using Self-Supervised Learning for IoT Edge Sensors

38 citations · 42 across the 8 of their papers we have counts for

collaborators

16 papers

cs.AR2026

A Framework for Accelerating Transformer Inference on RISC-V for Edge AI

Ajay Kumar M, Vishnu PS, Yike Li +5

This work presents a framework for accelerating transformer-based language models (LMs) on resource-constrained IoT devices. The framework targets compact LMs: BERT-Tiny (B-Ty), Mo…

cs.AR2026

A Pipelined FPGA Architecture for Banded Sparse Matrix Dense Matrix Multiplication in Longformer

Phillip Pramberger, Athanasios Tziouvaras, Shreejith Shanker +1

Sparse attention mechanisms have become increasingly important for transformer models processing long input sequences due to their lower computational and memory complexity compare…

cs.AR2026

Reinforcement Learning-Based Optimization of Workload-Aware Power Delivery Networks

Oran Hayes, Maria Pantazi-Kypraiou, Athanasios Tziouvaras +4

Power Delivery Networks (PDNs) are critical components of modern VLSI chips, providing stable voltage levels while satisfying electromigration (EM) and IR-drop constraints. Convent…

cs.LG2026

Co-Optimizing Graph Sparsification and Approximate Computing for Energy-Efficient FPGA-Based GCN Inference

Nathaniel Kaye Mellor, Shreejith Shanker, George Floros

Graph Convolutional Networks (GCNs) have emerged as a powerful framework for learning from graph-structured data, yet their deployment on resource-constrained edge platforms remain…

cs.AR2026

FINNAS: FINN-Guided Hardware-Aware NAS and Pruning for FPGA Jet Substructure Classification

Eva Chauffour, Changhong Li, Georgios Floros +1

FPGAs are well suited to deploying quantised neural networks (QNNs) under strict accuracy, latency, and resource constraints; however, identifying efficient model-accelerator combi…

cs.AR2026

FSNIC: A Low-Latency Flow-Based Intrusion Detection Architecture for FPGA SmartNICs

Nise O'Cuill, Changhong Li, Georgios Floros +1

Modern data centres require high-performance networking alongside effective real-time security. Traditional Intrusion Detection Systems (IDS) commonly rely on general-purpose proce…

cs.AR2026

EBL: Efficient Broad Learning for Distributed Adaptive Harmonic Analysis

Changhong Li, Georgios Floros, Biswajit Basu +1

Renewable energy systems and electrified transport have found widespread adoption in recent years. The integration of these non-linear loads, dominated by electric vehicle (EV) cha…

eess.SY2026

Model Predictive Current Control with Harmonic Correction for Single-Phase AC-DC EV Charging

Changhong Li, Bharathkumar Hegde, Biswajit Basu +1

The increasing integration of Electric Vehicles (EVs) has imposed a growing harmonic challenge on the power grid. For AC/DC Power Factor Correction (PFC) in single-phase On-Board C…

cs.AR2026

RQP: Resource-Oriented Quantiser Pruning for Neural Networks on FPGAs

Changhong Li, Biswajit Basu, Shreejith Shanker

High granularity quantisation (HGQ) exploits weight-level quantisation and pruning to design resource-efficient neural network accelerators, achieving an attractive trade-off betwe…

cs.AR2026

Workload-Aware Early-Stage Power Delivery Network Optimization via Architectural Power Traces

Oran Hayes, Maria Pantazi-Kypraiou, Athanasios Tziouvaras +4

Power Delivery Networks (PDNs) are critical for maintaining voltage integrity in modern multiprocessor systems. Conventional early-stage PDN planning relies on static or worst-case…

cs.AR2025

LogicSparse: Enabling Engine-Free Unstructured Sparsity for Quantised Deep-learning Accelerators

Changhong Li, Biswajit Basu, Shreejith Shanker

FPGAs have been shown to be a promising platform for deploying Quantised Neural Networks (QNNs) with high-speed, low-latency, and energy-efficient inference. However, the complexit…

eess.IV2025★ 1 cited

ReTiDe: Real-Time Denoising for Energy-Efficient Motion Picture Processing with FPGAs

Changhong Li, Clément Bled, Rosa Fernandez +1

Denoising is a core operation in modern video pipelines. In codecs, in-loop filters suppress sensor noise and quantisation artefacts to improve rate-distortion performance; in cine…

cs.AR2025★ 1 cited

MARVEL: An End-to-End Framework for Generating Model-Class Aware Custom RISC-V Extensions for Lightweight AI

Ajay Kumar M, Cian O'Mahoney, Pedro Kreutz Werle +5

Deploying deep neural networks (DNNs) on resource-constrained IoT devices remains a challenging problem, often requiring hardware modifications tailored to individual AI models. Ex…

cs.AR2025★ 2 cited

Bare-Metal RISC-V + NVDLA SoC for Efficient Deep Learning Inference

Vineet Kumar, Ajay Kumar M, Yike Li +2

This paper presents a novel System-on-Chip (SoC) architecture for accelerating complex deep learning models for edge computing applications through a combination of hardware and so…

cs.AR2025

FAV-NSS: An HIL Framework for Accelerating Validation of Automotive Network Security Strategies

Changhong Li, Shashwat Khandelwal, Shreejith Shanker

Complex electronic control unit (ECU) architectures, software models and in-vehicle networks are consistently improving safety and comfort functions in modern vehicles. However, th…

eess.SP2024★ 38 cited

ECG Biometric Authentication Using Self-Supervised Learning for IoT Edge Sensors

Guoxin Wang, Shreejith Shanker, Avishek Nag +2

Wearable Internet of Things (IoT) devices are gaining ground for continuous physiological data acquisition and health monitoring. These physiological signals can be used for securi…