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cs.OS2025★ 4 cited
My CXL Pool Obviates Your PCIe Switch
Yuhong Zhong, Daniel S. Berger, Pantea Zardoshti +5
Pooling PCIe devices across multiple hosts offers a promising solution to mitigate stranded I/O resources, enhance device utilization, address device failures, and reduce total cos…
cs.OS2024★ 1 cited
Dissecting CXL Memory Performance at Scale: Analysis, Modeling, and Optimization
Jinshu Liu, Hamid Hadian, Hanchen Xu +2
We present SupMario, a characterization framework designed to thoroughly analyze, model, and optimize CXL memory performance. SupMario is based on extensive evaluation of 265 workl…