2 citations · 2 across the 3 of their papers we have counts for
3 papers
cs.SE2025
TIT: A Tree-Structured Instruction Tuning Approach for LLM-Based Code Translation
He Jiang, Yufu Wang, Hao Lin +5
Large Language Models (LLMs) have shown strong performance in automated source-to-target code translation through pretraining on extensive code corpora. However, mainstream LLM-bas…
cs.SE2025
A Novel Mutation Based Method for Detecting FPGA Logic Synthesis Tool Bugs
Yi Zhang, He Jiang, Xiaochen Li +3
FPGA (Field-Programmable Gate Array) logic synthesis tools are key components in the EDA (Electronic Design Automation) toolchain. They convert hardware designs written in descript…
cs.AR2024★ 2 cited
A Novel HDL Code Generator for Effectively Testing FPGA Logic Synthesis Compilers
Zhihao Xu, Shikai Guo, Guilin Zhao +3
Field Programmable Gate Array (FPGA) logic synthesis compilers (e.g., Vivado, Iverilog, Yosys, and Quartus) are widely applied in Electronic Design Automation (EDA), such as the de…