2 citations · 2 across the 4 of their papers we have counts for
4 papers
A Novel Mutation Based Method for Detecting FPGA Logic Synthesis Tool Bugs
Yi Zhang, He Jiang, Xiaochen Li +3
FPGA (Field-Programmable Gate Array) logic synthesis tools are key components in the EDA (Electronic Design Automation) toolchain. They convert hardware designs written in descript…
Modeling Relational Logic Circuits for And-Inverter Graph Convolutional Network
Weihao Sun, Shikai Guo, Siwen Wang +2
The automation of logic circuit design enhances chip performance, energy efficiency, and reliability, and is widely applied in the field of Electronic Design Automation (EDA).And-I…
Identifying Root Cause of bugs by Capturing Changed Code Lines with Relational Graph Neural Networks
Jiaqi Zhang, Shikai Guo, Hui Li +3
The Just-In-Time defect prediction model helps development teams improve software quality and efficiency by assessing whether code changes submitted by developers are likely to int…
A Novel HDL Code Generator for Effectively Testing FPGA Logic Synthesis Compilers
Zhihao Xu, Shikai Guo, Guilin Zhao +3
Field Programmable Gate Array (FPGA) logic synthesis compilers (e.g., Vivado, Iverilog, Yosys, and Quartus) are widely applied in Electronic Design Automation (EDA), such as the de…