2 papers
cs.PL2024
Towards LLM-Powered Verilog RTL Assistant: Self-Verification and Self-Correction
Hanxian Huang, Zhenghan Lin, Zixuan Wang +3
We explore the use of Large Language Models (LLMs) to generate high-quality Register-Transfer Level (RTL) code with minimal human interference. The traditional RTL design workflow…
cs.CV2024
BCFPL: Binary classification ConvNet based Fast Parking space recognition with Low resolution image
Shuo Zhang, Xin Chen, Zixuan Wang
The automobile plays an important role in the economic activities of mankind, especially in the metropolis. Under the circumstances, the demand of quick search for available parkin…