3 papers
cs.AR2024
ROVER: RTL Optimization via Verified E-Graph Rewriting
Samuel Coward, Theo Drane, George A. Constantinides
Manual RTL design and optimization remains prevalent across the semiconductor industry because commercial logic and high-level synthesis tools are unable to match human designs. Ou…
cs.AR2024
On the Systematic Creation of Faithfully Rounded Commutative Truncated Booth Multipliers
Theo Drane, Samuel Coward, Mertcan Temel +1
In many instances of fixed-point multiplication, a full precision result is not required. Instead it is sufficient to return a faithfully rounded result. Faithful rounding permits…
cs.AR2024
Combining Power and Arithmetic Optimization via Datapath Rewriting
Samuel Coward, Theo Drane, Emiliano Morini +1
Industrial datapath designers consider dynamic power consumption to be a key metric. Arithmetic circuits contribute a major component of total chip power consumption and are theref…