12 citations · 19 across the 5 of their papers we have counts for
5 papers
PVAC: A RowHammer Mitigation Architecture Exploiting Per-victim-row Counting
Jumin Kim, Seungmin Baek, Hwayong Nam +3
As DRAM scaling exacerbates RowHammer, DDR5 introduces per-row activation counting (PRAC) to track aggressor activity. However, PRAC indiscriminately increments counters on every a…
Per-Row Activation Counting on Real Hardware: Demystifying Performance Overheads
Jumin Kim, Seungmin Baek, Minbok Wi +5
Per-Row Activation Counting (PRAC), a DRAM read disturbance mitigation method, modifies key DRAM timing parameters, reportedly causing significant performance overheads in simulato…
Sudoku: Decomposing DRAM Address Mapping into Component Functions
Minbok Wi, Seungmin Baek, Seonyong Park +2
Decomposing DRAM address mappings into component-level functions is critical for understanding memory behavior and enabling precise RowHammer attacks, yet existing reverse-engineer…
DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands
Hwayong Nam, Seungmin Baek, Minbok Wi +5
The demand for precise information on DRAM microarchitectures and error characteristics has surged, driven by the need to explore processing in memory, enhance reliability, and mit…
X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands
Hwayong Nam, Seungmin Baek, Minbok Wi +5
The demand for accurate information about the internal structure and characteristics of dynamic random-access memory (DRAM) has been on the rise. Recent studies have explored the s…